Change Location
EUR
 
Mouser Europe - Flag Mouser Europe

Incoterms: DDP is available to customers in EU Member States.
All prices include duty and customs fees on select shipping methods.

Incoterms: DDU applies to most non-EU customers.
Duty, customs fees and taxes are collected at time of delivery.

Please confirm your currency selection:

Euros
Euros are accepted for payment only in EU member states these countries.

US Dollars
USD is accepted in all countries.

Other currency options may also be available - see Mouser Worldwide.

Bench Talk for Design Engineers

Bench Talk

rss

Bench Talk for Design Engineers | The Official Blog of Mouser Electronics


Introducing an MCU Guy to FPGA: Part 4
On February 5, 2018 in All, Computing, Dev Tools, Maker, Student Central by Mouser Staff
Mouser Staff
Recently, I was given a project that required transition from MCU to FPGA development. In this four-part blog series, I examine how I translated my existing knowledge and experience with MCUs into FPGA development. In Part 4, I delve into the bridges that compose the FPGA fabric.
Read More »

9001 Views
Tagged With: AXI Bridge, Bridge, Cyclone V, DE10 Nano, Field-Programmable Gate Array, FPGA, Hard Processor System, high throughput, HPS, I/O, input/output, Integrated Circuits, Intel®, Intel® PSG, low throughput, MCU, microcontroller unit, OpenCV, Soc, Terasic
Introducing an MCU Guy to FPGA: Part 3
On December 13, 2017 in Computing, Dev Tools, Maker, Student Central by Mouser Staff
Mouser Staff
Recently I was given a project that required me to transition from MCU to FPGA development. In this four-part blog series, I examine how I translated my existing knowledge and experience with MCUs into FPGA development. In Part 2, I explored example code and discovered additional useful resources. Now in Part 3, I learned about OpenCV and simple data transferring from the FPGA to the MCU.
Read More »

10412 Views
Tagged With: Cyclone V, Field Programmable Gate Array, FPGA, Hard Processor Systems, HPS, I/O, Integrated Circuits, Intel, Intel PSG, MCU, OpenCV, SoC, Terasic DT10 Nano
Introducing an MCU Guy to FPGA: Part 2
On November 8, 2017 in All, Computing, Dev Tools, Maker, Student Central by Mouser Staff
Mouser Staff
Recently I was given a project that would require me to transition from MCU to FPGA development. In this four-part blog series, I examine how I translated my existing knowledge and experiencing with MCUs into FPGA development. In Part 1, I examined some advantages and disadvantages of FPGAs, introduced the Terasic DE10 Nano development kit, and explored a few key FPGA planning considerations. Now in Part 2, I explore example code and discover additional useful resources.
Read More »

12013 Views
Tagged With: Cyclone V, DE10 Nano, field programmable gate array, FPGA, FPGA planning, hard processor system, HPS, I/O, integrated circuits, Intel, MCU, SoC, Terasic
Introducing an MCU Guy To FPGA: Part 1
On November 6, 2017 in All, Computing, Dev Tools, Maker, Student Central by Mouser Staff
Mouser Staff
Recently I was given a project that would require me to make the transition from MCU to FPGA development, which requires a move into the bigger and more capable ARM cortex outside of the safety and ease of the mBed environment. In this four-part blog series, I’ll examine how to translate my existing knowledge and experiencing with MCUs into FPGA development. In Part 1, we’ll begin with some advantages and disadvantages of FPGAs, introduce you to the Terasic DE10 Nano development kit, and look at a few key FPGA planning considerations.
Read More »

13393 Views
Tagged With: Cyclone V, DE10 Nano, field programming gate array, FPGA, FPGA planning, hard processor system, HPS, I/O, integrated circuits, Intel, MCU, SoC, Terasic

Search

Categories

Featured Authors

All Authors

Show More Show More
View Blogs by Date

Archives