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Piezoelectric devices are common in modern-day electronics, with both bulk and nanoscale materials used to create devices that utilize the piezoelectric effect. But conventional piezoelectric devices are not the only class of devices that can harness a material’s stress and piezoelectricity. One such device is the piezotronic device. Piezotronic devices exhibit the piezotronic effect, which is when a piezopotential is used as a gate voltage to tune and control the charge carrier properties of the device.
Piezotronic devices are a very specific class of piezo devices that require piezoelectric semiconductor materials, as the devices’ mechanisms rely on both the piezopotential and the semiconducting properties of the material.
The design of piezotronic devices is quite different from complementary metal-oxide-semiconductor (CMOS) technology in regards to how they modulate the electronic current. So far, the interest in piezotronics devices has centered around transistors, logic operations, electromechanical memories, sensors, and thin film devices. While we are not looking at these applications specifically in this blog, we are going to take a deep look at how piezotronic devices use the piezotronic effect and what device architectures benefit the most from this charge carrier tuning phenomenon.
Before we look at the piezotronics effect, let’s first look at the piezoelectric effect. The piezoelectric effect is when a material has an electric charge when pressure or stress is applied to the material. This charge occurs because the ions rearrange internally under this mechanical load and generate an electrical voltage. This is piezoelectricity.
When the charges rearrange within the lattice of piezoelectric material, it generates dipole changes at either end of the material. This is particularly true for lattices that have a large degree of anisotropy—directional dependence—and a non-central symmetry, as the shifting of charges creates stronger dipole moments in the material. The addition of all the dipole moments across a piezoelectric material can result in a macroscopic potential drop along the straining axis. This is called a piezoelectric potential, which is also known as piezopotential. The piezopotential is dependent on the strain applied, so it will persist so long as the mechanical strain is still applied.
Now, this piezopotential can be harnessed and used as a gating voltage to construct piezotronic devices. For piezotronic devices to be functional, the material undergoing the strain also needs to be semiconducting in nature. This is because the piezopotential serves as a gate to tune and control the charge carrier properties across a semiconducting interface—be it a semiconductor-metal contact or a semiconducting p-n junction.
Given the need for directional dependent materials, designers create many piezotronic devices using nanowires because they are one-directional materials, so electrons can only flow in one direction Unlike piezoelectric devices that can use bulk materials as well as nanoscale materials, piezotronics materials have emerged because of nanotechnology.
In piezotronic devices, the nanowire can be used to create a piezopotential that is either along or perpendicular to its long axis. For inducing a piezopotential along its axis, the nanowires are placed between two metal electrodes. The nanowire is often placed horizontally on a flexible material that will bend with any mechanical deformations. To create the piezopotential, the nanowires undergo stretching or compression and a piezopotential is produced along its axis. The piezopotential alters the electric field and Schottky barrier height, which will be discussed in more detail later. A positive piezopotential at one end reduces the Schottky barrier height at the contact height, whereas a negative piezopotential will increase the Schottky barrier height, leading to the transport properties being changed and tunable based on the piezopotential.
A second approach is to attach the nanowire to a metal electrode at one of the device’s ends but leave it freestanding at the other. In this approach, a mechanical force is applied to the free end of the nanowire to bend it and the piezopotential will distribute perpendicular to its long axis. The induced piezoelectric field is therefore perpendicular to the electron transport direction, which is along its axis due to quantum confinement of electrons in the other two dimensions. The potential induced is related to the aspect ratio of the nanowire in this approach and this way is very similar to the principles of applying a gate voltage in field effect transistors (FETs). This approach induces asymmetric I-V characteristics that allow the electron transport properties to be changed by tuning the perpendicular piezopotential voltage gate.
As mentioned above, there are several key architectural areas for piezotronic devices, which includes semiconducting devices at either the metal-semiconductor (M-S) interface or in a p-n junction.
A metal and a semiconductor come together to form an M-S interface. When this happens, the charges redistribute because the electronic wavefunctions of the materials overlap. This happens until the interface reaches a thermal equilibrium and the Fermi levels on either side of the interface align. This then causes a net charge transfer at the interface.
If the semiconductor’s electron affinity is lower than the work function of the metal at the interface, then electrons will flow across the interface from the semiconductor and into the metal. This also forms a depletion region at the interface and deforms the energy bands close to the interface. This energy band discontinuity near the interface is known as the Schottky barrier and can have different “heights” depending on how close it is to the interface.
The Schottky barrier is a measure of the energy level mismatch for the charge carriers across the interface. The energy level mismatch determines the level of charge carrier transport across the interface and is a crucial aspect of semiconductor devices. A current can only pass through the Schottky barrier if the applied (positive) electrical bias on the metal is larger than a threshold value.
This is the principle for M-S junctions, but when the semiconductor side possesses piezoelectric properties, the strain induced on the semiconductor side leads to the generation of negative piezoelectric polarization charges. The negative polarization charges can repel the electrons away from the interface to create a larger depletion zone and larger Schottky barrier height. On the other hand, if the polarity from the strain is reversed, the generated piezopotential can attract the electrons. This results in a reduction of the depletion zone at the interface and a smaller Schottky barrier height.
The ability to either attract or repel the electrons across the barrier using the induced strain and piezopotential of nanowires offers a way to modulate the local contact characteristics across the junction and the current through the device. By varying the magnitude and polarity of the applied strain, it enables piezotronic systems to tune the current across the M-S interface, which can then be used to modulate semiconductor devices.
P-n junctions have become a vital building block in modern-day electronics. P-n junctions have two semiconducting regions, where each region is oppositely doped to the other—one is doped with positive charge carriers and the other is doped with negative charge carriers.
When p-doped and n-doped materials form a junction, the positively charged holes from the p-type side and the negatively charged electrons from the n-type side migrate across the junction. As the two charge carriers travel across the junction, the electrons combine with the holes to form a neutrally charged depletion zone. This process redistributes the balance of charges and the local potential, leading to a thermal equilibrium due to an aligned Fermi energy across the system.
The formation of a depletion zone leaves charge carriers—holes and electrons—separated on either side of the zone. The presence of a depletion zone can enhance the piezotronics effect if such materials are used as part of the semiconducting junction. This is because the piezoelectric polarization charges are preserved due to the residual free carriers in the depletion zone being negligible.
For these types of piezotronic-enhanced junctions, only the n-type material is typically piezoelectric. Once a strain is induced on the device containing the junction, positive piezoelectric polarization charges—and a positive piezopotential—become induced close to the junction on the n-type side. This attracts the electrons towards the interface, resulting in the trapping or accumulation of electrons adjacent to the interface, which causes a change in the electronic band profile around the interface. The ability to change this band profile with the piezotronics effect means that the electronic properties and current across the device can be modulated by changing the flow of charge carriers towards the junction.
Piezotronic devices are a nanotechnology-facilitated subset of piezoelectric devices that use the piezopotential generated in the piezoelectric devices to modulate the transfer of charge carriers in semiconducting junctions. They are typically made up of 1D materials, such as semiconducting nanowires, and are gathering interest in semiconductor devices. So far, they have been utilized in metal-semiconductor interfaces and p-n junctions and offer different device properties to other piezoelectric devices, including CMOS charge carrier modulation devices.
Liam Critchley is a writer, journalist and communicator who specializes in chemistry and nanotechnology and how fundamental principles at the molecular level can be applied to many different application areas. Liam is perhaps best known for his informative approach and explaining complex scientific topics to both scientists and non-scientists. Liam has over 350 articles published across various scientific areas and industries that crossover with both chemistry and nanotechnology.
Liam is Senior Science Communications Officer at the Nanotechnology Industries Association (NIA) in Europe and has spent the past few years writing for companies, associations and media websites around the globe. Before becoming a writer, Liam completed master’s degrees in chemistry with nanotechnology and chemical engineering.
Aside from writing, Liam is also an advisory board member for the National Graphene Association (NGA) in the U.S., the global organization Nanotechnology World Network (NWN), and a Board of Trustees member for GlamSci–A UK-based science Charity. Liam is also a member of the British Society for Nanomedicine (BSNM) and the International Association of Advanced Materials (IAAM), as well as a peer-reviewer for multiple academic journals.
